Mohamed Elrabaa

I. Research projects carried out at UAE University

Project Title	Type	Duration	Capacity
Development of Intelligent Sensors for Environmental Applications in UAE	Sponsored by UAEU	1999-2000	Principal Investigator
Development of Integrated Micro-electronic Heavy Metal Sensors for Environmental Applications in UAE	Sponsored by UAEU	2000-2001	Principal Investigator
A Contention-Free Domino Logic For Scaled-Down CMOS Technologies With Ultra Low Threshold Voltages*	Unsponsored	1998-1999	Principal Investigator
Split-Gate Logic Circuits for Multi-Threshold Voltage Technologies*	Unsponsored	1998-1999	Principal Investigator
Fully Digital Clock Recovery Circuits for NRZ Source-Synchronous Serial Data communications	Unsponsored	1999-2001	Principal Investigator

* Part of this work was done in collaboration with the VLSI research group at the University of Waterloo, Waterloo, Ontario,

CANADA during the summer of 1999 where I was a visiting research professor.

II. Research projects carried out at KFUPM

Project Title	Type	Duration	Capacity
All-Digital Clock Recovery Circuits for NRZ Source-Synchronous Serial Data communications	Sponsored by KFUPM	2004-2006	Principal Investigator
Using the On-Chip Advantage in Designing Networks-On-Chip	Sponsored by SABIC/Fast Track	2005-2006	Co-Investigator
Developing a Network-On-Chip for Field Programmable Gate Arrays (FPGAs)*	Sponsored by KFUPM	2007-2009	Principal Investigator
Novel Low-Power Noise Tolerant CMOS Logic Circuits	Unsponsored	2001-2003	Principal Investigator
Imprecise Computing	Unsponsored	2003-2005	Principal Investigator

* An on-going project

III Patents

1. M. S. Elrabaa and M. I. Elmasry, "Low-Power BiCMOS/ECL SRAM" United States Patent # 5,602,774, awarded in

Feb. 11th, 1997.

2. M. S. Elrabaa, M. I. Elmasry, and D. S. Malhi, "A BiCMOS Transceiver (Driver and Receiver) for Gigahertz Operation"

United States Patent # 5,966,032, awarded in Oct. 12th, 1999.

IV. Books

1. M. S. Elrabaa, I. S. Abu-Khater, and M. I. Elmasry, "Advanced Low-Power Digital Circuit Techniques" Kluwer Academic Publications, 1997.

V. Referred Journal Papers

Muhammad E. S. Elrabaa, "Portable Clock Recovery Circuits (CRCs) For On-Chip and Off-Chip Serial Data Communication," Accepted for publication in the Arabian Journal for Science and Engineering (AJSE), December issue, 2007.
A. Bouhraoua and Muhammad E. S. Elrabaa, "An Efficient Network-ON-Chip Architecture Based on Fat-Tree (FT) Topology," Accepted for publication in the Arabian Journal for Science and Engineering (AJSE) ), December issue, 2007.
Muhammad E. S. Elrabaa, "A New Static Differential CMOS Logic with Superior Low Power Performance," Analog Integrated Circuits and Signal Processing, Vol. 43, No. 2, pp. 183-190, May 2005.
Muhammad E. S. Elrabaa, "An All-Digital Clock Recovery and Data Retiming Circuitry for High Speed NRZ Data Communications," Institute of Electronics, Information and Communication Engineers (Japan) Transactions on Electronics, Vol. E85-C, No. 5, P. 1170, May, 2002.
Muhammad E. S. Elrabaa, Mohab Anis, and ohamed Elmasry, "A Contention-Free DOMINO Logic For Scaled-Down CMOS," Institute of Electronics, Information and Communication Engineers (Japan) Transactions on Electronics, TVol. E85-C, No. 5, P. 1177, May, 2002.
M. S. Elrabaa, M. I. Elmasry, and D. S. Malhi, "Low-Power BiCMOS Circuits for High-Speed Interchip Communication," IEEE Journal of Solid-State Circuits, vol. 32, PP. 604-609, April 1997.
M. S. Elrabaa, M. Obrecht, and M. I. Elmasry, "Novel Low-power Low-voltage Full Swing BiCMOS Circuits," IEEE Journal of solid-state Circuits, vol. 29, PP. 86-94, Feb 1994.
M. S. Elrabaa and M. I. Elmasry, "Design and Optimization of Buffer Chains and Logic Circuits in a BiCMOS Environment," IEEE Journal of solid-state Circuits, vol. 27, PP. 792-801, May 1992.
M. S. Elrabaa and M. I. Elmasry, "Multi-Emitter BiCMOS CML Circuits," IEEE Journal of solid-state Circuits, vol. 27, PP. 454-458, March 1992.

VI. Referred Technical Conference Papers

1. A. Bouhraoua and Muhammad E. S. Elrabaa, "Addressing Heterogeneous Bandwidth Requirements in Modified Fat-Tree Networks on Chips," Proc. 4th IEEE International Symposium on Electronic Design, Test & Applications (DELTA 2008), pp. 486-490, January 2008, Hong Kong.

2. Muhammad E. S. Elrabaa, “An All-Digital Clock Frequency Capturing Circuitry For NRZ Data Communications,” Proc.13^th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), pp. 106-109, Dec. 2006, Nice, France

3. Muhammad E. S. Elrabaa, “A Portable Clock Recovery Circuit (CRC) For Systems-On-Chip Serial Data Communication,” Proc. International Conference on Microelectronics (ICM06), pp. 198-201, Dec. 2006, Dhahran.

4. Muhammad E. S. Elrabaa, “

,” Proc. International Conference on Microelectronics (ICM06), pp. 206-209, Dec. 2006, Dhahran.

5. A. Bouhraoua and Muhammad E. S. Elrabaa, “An Efficient Network-on-Chip Architecture Based on Modified Bidirectional Multi-Stage Interconnection Network (MIN) Topology,” Proc. International Conference on Microelectronics (ICM06), pp. 28-31, Dec. 2006, Dhahran.

6. A. Bouhraoua and Muhammad E. S. Elrabaa, “A High-Throughput Network-on-Chip Architecture for Systems-on-Chip Interconnect,” Proc. of the International Symposium on System-on-Chip (SOC06), pp. 1-4, November 2006, Tampere, Finland.

7. Muhammad E. S. Elrabaa, “A New Static Differential CMOS Logic With Superior Low Power Performance,” Proceedings of the 10^th IEEE International Conference on Electronics, Circuits, and Systems, Dec. 2003.

8. Muhammad E. S. Elrabaa, “ REVIEW OF HIGH-SPEED DIGITAL CMOS CIRCUITS,” Proceedings of the 6th Saudi Engineering Conference, Dhahran, Dec. 2002.

9. Muhammad E. S. Elrabaa and M. I. Elmasry, “Split-Gate Logic Circuits for Multi-Threshold Technologies,” International Symp. On Cir. And Systems (ISCAS’01), Sydney, Australia.

10. M. E. S. Elrabaa, M. I. Elmasry, and M. H. Anis, “Contention-Free Domino Logic for scaled down CMOS Technologies with Ultra Low Threshold Voltages,” The 2000 International Symp. On Cir. And Systems, Geneva, Switzerland.

11. Muhammad E. S. Elrabaa, M. I. Elmasry, and D. S. Malhi, "A Universal 3.3V 1GHz BiCMOS Transceiver (Driver/Receiver)," Proc. of the IEEE Bipolar /BiCMOS Circ. and Tech. Meeting, PP. 118-120, Minnesota, 1995.

12. Muhammad E. S. Elrabaa and M. I. Elmasry, "Low-Power Circuit Techniques for High-Speed ECL SRAMs," Proc. of the 21st European Solid-State Circuits Conference (ESSCIRC), France, 1995.

13. Muhammad E. S. Elrabaa and M. I. Elmasry, "Optimization of Digital BiCMOS Circuits, An Overview," An Invited Tutorial, Proc. of the 35^th Midwest Symp. On Circuits and Systems, pp. 571-574, 1992.

VII. Educational, Counseling, Advising and Skills Conference Proceedings & Seminars

1. Gave a seminar titled “Design of Digital BiCMOS Logic Gates,” in the 1992 CMC (Canadian Microelectronics Corp.) VLSI Workshop in Kingston Ontario.

2. Gave a seminar titled “Design of Digital BiCMOS and ECL Standard Cell Liberary for CADENCE Design Environment,” in the 1993 CMC (Canadian Microelectronics Corp.) VLSI Workshop in Kingston Ontario.

3. Gave a seminar titled “Design of Full-Swing BiCMOS Buffers,” in the 1994 ITRC (Ontario Center of Excellence Annual Meeting

4. Gave a seminar titled "Assigning Letter Grades Based on Clustering: A Relative Grading Approach ," in 2005 for the workshop Grading Practices in KFUPM.

5. Gave a seminar titled "Design of VLSI Integrated Circuits," three times between 2002 and 2004 for a workshop for gifted High School Students.

6. Gave a seminar titled "Introducing Multi-Phase Design into a Junior-Level Course," in 2006 in the 1st KFUPM Workshop on Engineering Design.

7. Gave a seminar titled "Product Development: A Short Guide," several times for Senior Computer Engineering students at KFUPM

between 2001 and 2004

VIII. Technical Reports

1. M. E. S. Elrabaa, “Development of Digital Circuit Techniques for Clock Recovery and Data Re-Timing for High Speed Non-Return-to-Zero Source-Synchronous Serial Data Communications,” A final report for the Internally Funded project IN000287.

IX Citations

In total, my publications have been cited 57 times. The list below provides the total number of citations for each publication.

Total number of citations of the book "Advanced Low-Power Digital Circuit Techniques" Kluwer Academic Publications, USA, 1997, are 21.
Patent Citations (Total number of citations: 18)

a. The following patent was cited by 4 other US patents: M. S. Elrabaa and M. I. Elmasry, "Low-Power BiCMOS/ECL SRAM" United States Patent # 5,602,774, awarded in Feb. 11th, 1997

b. The following patent was cited by 14 other US patents: M. S. Elrabaa, et. al. , "A BiCMOS Transceiver (Driver and Receiver) for Gigahertz Operation" United States Patent # 5,966,032, awarded in Oct. 12th, 1999

Paper Citations (Total number of citations: 18)

Total citations for the paper: M. E. S. Elrabaa, M. I. Elmasry, and M. H. Anis, “Contention-Free Domino Logic for scaled down CMOS Technologies with Ultra Low Threshold Voltages,” The 2000 International Symp. On Cir. And Systems, Geneva, Switzerland, are 3.
Total citations for the paper: Muhammad E. S. Elrabaa, "A New Static Differential CMOS Logic with Superior Low Power Performance," Analog Integrated Circuits and Signal Processing, Vol. 43, No. 2, pp. 183-190, May 2005, are 1.
Total citations for the paper: Muhammad E. S. Elrabaa, M. I. Elmasry, and D. S. Malhi, "A Universal 3.3V 1GHz BiCMOS Transceiver (Driver/Receiver)," Proc. of the IEEE Bipolar /BiCMOS Circ. and Tech. Meeting, 1995, are 1.
Total citations for the paper: Muhammad E. S. Elrabaa, M. Obrecht, and M. I. Elmasry, "Novel Low-power Low-voltage Full Swing BiCMOS Circuits," IEEE Journal of solid-state Circuits, vol. 29, PP. 86-94, Feb 1994, are 9.
Total citations for the paper: Muhammad E. S. Elrabaa and M. I. Elmasry, "Design and Optimization of Buffer Chains and Logic Circuits in a BiCMOS Environment," IEEE Journal of solid-state Circuits, vol. 27, PP. 792-801, May 1992, are 4.