COE 203 LAB Experiments

COE 203: Digital Logic Design Lab

Lab Manual

Experiment 1. Logic Gates (pdf)

Experiment 2. Integrated Circuits; Electrical Properties and Specifications (pdf)

Experiment 3. Digital Circuit Prototyping Using FPGAs (pdf)

Experiment 4. Hierarchical Design (pdf)

Experiment 5. Combinational Logic Design (pdf)

Experiment 6. Counters and Registers (pdf)

Experiment 7. Multiplier Design (pdf)

Experiment 8. Clock (pdf)

Experiment 9. Building a Digital Timer (pdf)

Experiment 10. Generating Random Delay (pdf)

Experiment 11. Response Time (pdf)