Publications in Refereed Journals

Brief Information about myself:

Hi, greetings, and thanks for dropping by. I am Sadiq, (formally known as Dr. Sait). I am currently a Professor at the Department of Computer Engineering, King Fahd University of Petroleum & Minerals (a.k.a KFUPM), Dhahran, Saudi Arabia. I joined KFUPM in October 1981. I received a BE degree in Electronics Engineering from Bangalore University, India, in 1981, and MS and PhD degrees in Electrical Engineering from KFUPM in 1983 and 1987 respectively. My research interests are several, but primarily in the areas of VLSI Design Automation, Iterative Computer Algorithms, Evolutionary Techniques, Information Technology. I am currently the Director of Information Technology Center, (ITC) at KFUPM, Dhahran. I am a Senior member of the IEEE, member of IEEE Computer Society, and IEEE CAS Society.
 

No.

Paper Details

01 MASUD M, SAIT SADIQ M.
Universal AHPL-A Language For VLSI Design Automation
IEEE Circuits and Devices Magazine, 2 (5): 8-14 SEP 1986
Paper in PDF
02 SAIT SADIQ M., KULAIB MA
A CMOS Cell for Parallelly Loadable Counters
International Journal of Electronics, 62 (6): 867-871 NOV 1987
Paper in PDF
03 SOOMRO AA, SAIT SADIQ M., RAHMAN M
BIT-SLICE MICROPROCESSOR-BASED COMMUNICATIONS DECODER
MICROPROCESSORS AND MICROSYSTEMS 11 (10): 527-533 DEC 1987
Paper in PDF (Abstract only)
04 SOOMRO AA, RAHMAN M, SAIT SADIQ M.
A GENERAL REAL-TIME DECODER BASED ON AMD2900 DEVICES
MICROPROCESSING AND MICROPROGRAMMING 22 (2): 97-113 FEB 1988
Paper in PDF (Abstract only)
05 SAIT SADIQ M., YAAGOUB AY, MASUD M
CAD TOOL FOR THE AUTOMATIC-GENERATION OF MICROPROGRAMS
MICROPROCESSORS AND MICROSYSTEMS 12 (8): 463-470 OCT 1988
Paper in PDF (Abstract only)
06 KULAIB MA, BECKHOFF GF, SAIT SADIQ M.
DESIGN OF A PROGRAMMABLE LENGTH FIFO MEMORY AND ITS CONTROLLER
INTERNATIONAL JOURNAL OF ELECTRONICS 65 (5): 923-932 NOV 1988
Paper in PDF
07 SAIT SADIQ M., ALKHULAIWI FA
AUTOMATIC WEINBERGER ARRAY SYNTHESIS FROM UAHPL DESCRIPTION
INTERNATIONAL JOURNAL OF ELECTRONICS 69 (2): 211-224 AUG 1990
Paper in PDF
08 SAIT SADIQ M., ALRASHED MAA
EFFICIENT ALGORITHM FOR WEINBERGER ARRAY FOLDING
INTERNATIONAL JOURNAL OF ELECTRONICS 69 (4): 509-518 OCT 1990
Paper in PDF
09 SAIT SADIQ M., ELMALEH AH
STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
INTERNATIONAL JOURNAL OF ELECTRONICS 71 (1): 1-12 JUL 1991
Paper in PDF
10 SAIT SADIQ M.
ARCHITECTURE TO STORE PATH HISTORY IN A TRELLIS AND ITS APPLICATION TO VITERBI DECODING
INTERNATIONAL JOURNAL OF ELECTRONICS 72 (1): 11-19 JAN 1992
Paper in PDF
11 YAZDANI J, MASUD M, SAIT SADIQ M.
PCB LAYOUT GENERATION FROM RTL SPECIFICATIONS
INTERNATIONAL JOURNAL OF ELECTRONICS 72 (1): 1-10 JAN 1992
Paper in PDF
12 SAIT SADIQ M.
INTEGRATING UAHPL-DA SYSTEMS WITH VLSI DESIGN TOOLS TO SUPPORT VLSI DA COURSES
IEEE TRANSACTIONS ON EDUCATION 35 (4): 321-330 NOV 1992
Paper in PDF
13 SAIT SADIQ M., TANVIR MSK
VLSI LAYOUT GENERATION OF A PROGRAMMABLE CRC CHIP
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 39 (4): 911-916 NOV 1993
Paper in PDF
14 BENTEN MST, SAIT SADIQ M.
GAP - A GENETIC ALGORITHM APPROACH TO OPTIMIZE 2-BIT DECODER PLAS
INTERNATIONAL JOURNAL OF ELECTRONICS 76 (1): 99-106 JAN 1994
Paper in PDF
15 BENTEN MST, SAIT SADIQ M.
GENETIC SCHEDULING OF TASK GRAPHS
INTERNATIONAL JOURNAL OF ELECTRONICS 77 (4): 401-415 OCT 1994
Paper in PDF
16 SAIT SADIQ M., BENTEN MS, KHAN AMT
DESIGNING ASICS WITH UAHPL
IEEE CIRCUITS AND DEVICES MAGAZINE 11 (2): 14-24 MAR 1995
Paper in PDF
17 SAIT SADIQ M., HASAN W
HARDWARE DESIGN AND VLSI IMPLEMENTATION OF A BYTE-WISE CRC GENERATOR CHIP
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 41 (1): 195-200 FEB 1995
Paper in PDF
18 BENTEN MST, SAIT SADIQ M., ALMULHEM AS, et al.
RTL STRUCTURAL SYNTHESIS FROM BEHAVIORAL DESCRIPTIONS IN A UNIX ENVIRONMENT
ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING 19 (4B): 783-803 OCT 1994
Paper in PDF
19 SAIT SADIQ M., YOUSSEF H, BENTEN MST, et al.
AUTOMATED VHDL COMPOSITION FROM AHPL
ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING 19 (4B): 771-781 OCT 1994
Paper in PDF
20 ALNUWEIRI HM, SAIT SADIQ M.
EFFICIENT NETWORK FOLDING TECHNIQUES FOR ROUTING PERMUTATIONS IN VLSI
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 3 (2): 254-263 JUN 1995
Paper in PDF
21 SAIT SADIQ M., KHALID MAA
VLSI DESIGN AND IMPLEMENTATION OF SYSTOLIC TREE QUEUES
MICROPROCESSORS AND MICROSYSTEMS 19 (3): 139-146 APR 1995
Paper in PDF (Abstract Only)
22 Sait Sadiq M., Elleithy KM, MasudulHasan
Formal synthesis of VLSI layouts from algorithmic specifications
COMPUTER SYSTEMS SCIENCE AND ENGINEERING 11 (2): 67-81 MAR 1996
Paper in PDF
23 Sait Sadiq M., Ali S, Benten MST
Scheduling and allocation in high-level synthesis using stochastic techniques
MICROELECTRONICS JOURNAL 27 (8): 693-712 NOV 1996
Paper in PDF (Abstract only)
24 Youssef H, Sait Sadiq M., AlMulhelm AS, et al.
High-level synthesis from purely behavioral descriptions
COMPUTER SYSTEMS SCIENCE AND ENGINEERING 11 (5): 259-273 SEP 1996
Paper in PDF
25 Sait Sadiq M., Youssef H
Timing influenced general-cell genetic floorplanner
MICROELECTRONICS JOURNAL 28 (2): 151-166 FEB 1997
Paper in PDF (Abstract only)
26 Sait Sadiq M., Farooqui AA
The architecture of a highly reconfigurable RISC dataflow array processor
INTERNATIONAL JOURNAL OF ELECTRONICS 83 (4): 493-518 OCT 1997
Paper in PDF
27 Sait Sadiq M., Youssef H
CMOS/BiCMOS mixed design using tabu search
ELECTRONICS LETTERS 34 (14): 1395-1396 JUL 9 1998
Paper in PDF
28 Sait Sadiq M., Farooqui AA, Beckhoff GF
A novel technique for fast multiplication
INTERNATIONAL JOURNAL OF ELECTRONICS 86 (1): 67-77 JAN 1999
Paper in PDF
29 Sait Sadiq M., Youssef H, Nassar K, et al.
Timing driven genetic placement
COMPUTER SYSTEMS SCIENCE AND ENGINEERING 14 (1): 3-14 JAN 1999
Paper in PDF
30 Youssef H, Sait Sadiq M.
Timing-driven global routing for standard-cell VLSI design
COMPUTER SYSTEMS SCIENCE AND ENGINEERING 14 (3): 175-185 MAY 1999
Paper in PDF
31 Youssef H, Sait Sadiq M., Shragowitz E, et al.
Fuzzy genetic algorithm for floorplanning
ENGINEERING INTELLIGENT SYSTEMS FOR ELECTRICAL ENGINEERING AND COMMUNICATIONS 8 (3): 145-153 SEP 2000
Paper in PDF (Abstract only)
32 Youssef H, Sait Sadiq M., Adiche H
Evolutionary algorithms, simulated annealing and tabu search: a comparative study
ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE 14 (2): 167-181 APR 2001
Paper in PDF
33 Al-Yamani A, Sait Sadiq M., Youssef H, et al.
Parallelizing tabu search on a cluster of heterogeneous workstations
JOURNAL OF HEURISTICS 8 (3): 277-304 MAY 2002
Paper in PDF
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Youssef H, Sait Sadiq M., Khan SA
Fuzzy evolutionary hybrid metaheuristic for network topology design
LECTURE NOTES IN COMPUTER SCIENCE 1993: 400-415 2001
Paper in PDF

35 Youssef H, Al-Mulhem A, Sait Sadiq M., et al.
QoS-driven multicast tree generation using tabu search
COMPUTER COMMUNICATIONS 25 (11-12): 1140-1149 Sp. Iss. SI JUL 1 2002
Paper in PDF
36 Sait Sadiq M., Zahra MM
Tabu search based circuit optimization
ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE 15 (3-4): 357-368 JUN-AUG 2002
Paper in PDF
37 Youssef H, Sait Sadiq M., Khan SA
Topology design of switched enterprise networks using a fuzzy simulated evolution algorithm
ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE 15 (3-4): 327-340 JUN-AUG 2002
Paper in PDF
38 Youssef H, Sait Sadiq M., Ali H
Fuzzy simulated evolution algorithm for VLSI cell placement
COMPUTERS & INDUSTRIAL ENGINEERING 44 (2): 227-247 FEB 2003
Paper in PDF
39 Barada H, Sait Sadiq M., Baig N
A simulated evolution approach to task matching and scheduling in heterogeneous computing environments
ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE 15 (5): 491-500 SEP 2002
Paper in PDF
40 Sait Sadiq M., Khan JA
Simulated evolution for timing and low power VLSI standard cell placement
ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE 16 (5-6): 407-423 AUG-SEP 2003
Paper in PDF
41 Sait Sadiq M. Al-Tawil KA, Hussain SA
E-Commerce in Saudi Arabia: Adoption and Perspectives
Australian Journal of Information  (AJIS) Systems 12 (1): 54-74, Sep 2004
Paper in PDF
42 Youssef H, Sait Sadiq M., Khan SA
A fuzzy evolutionary algorithm for topology design of campus networks
ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING 29 (2B): 195-212 OCT 2004
Paper in PDF
43 El-Maleh AH, Sait Sadiq M., Shazli SZ
Evolutionary algorithms for state justification in sequential automatic test pattern generation
ENGINEERING INTELLIGENT SYSTEMS FOR ELECTRICAL ENGINEERING AND COMMUNICATIONS 13 (1): 15-21 MAR 2005
Paper in PDF
44 Minhas MR, Sait Sadiq M.
A parallel tabu search algorithm for optimizing multiobjective VLSI placement
LECTURE NOTES IN COMPUTER SCIENCE 3483: 587-595 2005
Paper in PDF
45 Sait Sadiq M., El-Maleh AH, Al-Abaji RH
Evolutionary algorithms for VLSI multi-objective netlist partitioning
ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE 19 (3): 257-268 APR 2006
Paper in PDF
46 Sait Sadiq M., Minhas MR
SimE/TS fuzzy hybrid for multiobjective VLSI placement
ELECTRONICS LETTERS 42 (6): 364-365 MAR 16 2006
Paper in PDF
47 Sait Sadiq M., Khan JA
Fast Fuzzy Force-Directed Simulated Evolution metaheuristic for Multiobjective VLSI cell placement
Arabian Journal for Science and Engineering Submitted Jun 2006
Paper in PDF
48 Sait Sadiq M., Abu-Amara MH, Abdul Subhan
Designing Cellular Mobile Networks Using Non-Deterministic Iterative Heuristics
Journal of Applied Soft Computing submitted Oct 2006
Paper in PDF
49 El-Maleh AH, Khursheed SS, Sait Sadiq M.
Efficient static compaction techniques for sequential circuits based on reverse-order restoration and test relaxation
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 25 (11): 2556-2564 NOV 2006
Paper in PDF
50 Sait Sadiq M., Al-Tawil KM, Syed S., Faheemuddin M
Impact of Internet Usage in Saudi Arabia: A Social Perspective
International Journal of Information Technology and Web Engineering 1 (4): Dec 2006
Paper in PDF
51 Siddiqui U F, Sait Sadiq M.
A Method to Parallelize Lookup Table (LUT) Method for Inverse Halftoning and its Hardware Implementation
Arabian Journal of Science and Engineering (AJSE) Submitted Dec 2006
Paper in PDF
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